1. Field of the Invention
This invention relates to a memory device having an operating function, and more particularly, to a memory device having an operating function used for graphic processing in which a large amount of data must be processed at a high speed.
2. Description of the Related Art
In a case where picture elements such as graphic images are processed, a processing unit is required to process a large amount of data in a memory device at a high speed. The memory device used for graphic processing is required to have a function of mixedly processing picture element data in addition to the function of an image memory. The processing of picture element data includes registration of image data and data processing of data of adjacent picture elements or a plurality of picture elements.
An example of a conventional processing unit having an operating function for mixedly processing picture element data is constructed as shown in the form of a block diagram in FIG. 1. The processing unit shown in this Figure includes operation processing unit 91, system memory 92, and image memory 93 which are connected to each other via data bus 94. Image memory 93, in which image data is stored, is arranged apart from operation processing unit 91. Operation processing unit 91 reads out data from image memory 93 via data bus 94, processes the readout data, and writes the processed data into image memory 93, again via data bus 94. For this reason, even if the processing capacity of operation processing unit 91 is extremely large, the performance of the whole processing unit is determined by time required for data readout/write-in operations in image memory 93 and an amount of data to be processed at each access. In order to effectively operate operation processing unit 91, it is necessary to reduce time for data readout/write-in operations in image memory 93 and increase an amount of data to be processed by operation processing unit 91 at each access. With recent image memories, the time required for readout/write-in operations have been gradually reduced and high-speed and small-capacity image memories have been developed for special applications. However, they are generally expensive and are not suitable for a large capacity. The width of data to be read out or written in at each access is limited to 1-bit width, 4-bit width or 8-bit width. In order to increase the data width, a large number of memories connected in parallel must be used, and there are economical and physical limitations.
Based on the fact as described above, various attempts have been made to reduce time for readout/write-in operation in image memory 93 to a minimum, increase the number of bits of data bus 94 to a maximum and enhance the processing capacity of operation processing unit 91 so as to increase the band width and enhance the performance of the whole processing unit.
As described above, since the operation processing unit and memory device are separated from each other in the conventional processing unit having a function of mixedly processing picture element data, a large amount of image data cannot be processed at a high speed when operation processing such as image processing is effected.